The present invention relates in general to a local interconnect, and, more particularly, to a low resistance local interconnect having a refractory metal silicide, and a process of making the same.
In the manufacture of integrated circuits used in the construction of dynamic random access memories (DRAMs), static random access memories (SRAMs), and the like, interconnects are required to provide the necessary electrical paths between field effect transistors and other devices fabricated on the semiconductor substrate and the external circuitry used to pass data to and from these devices. Polycide structures are commonly used to form the gate of a metal oxide semiconductor field effect transistor (MOSFET). Polycide structures are especially attractive for self-aligned gates. A polycide structure is formed by depositing a layer of doped polysilicon over the gate insulation layer. The polysilicon is then etched to define the gate electrode. A refractory metal, such as titanium, is then formed over the remaining polysilicon and silicon substrate. A metal silicide is formed by annealing the polysilicon and the refractory metal with the polysilicon supplying the source of silicon for the silicide. The unreacted refractory metal is etched, with the remaining polysilicon and metal silicide forming the polycide gate.
A local interconnect is typically used to connect the polycide gate to certain active semiconductor areas, such as the drain or source of another MOSFET. A local interconnect may also be used to connect active semiconductor areas to other active semiconductor areas which are separated by an insulating region, such as a field oxide region. Titanium silicide (TiSi2) is commonly used as a local interconnect for connecting desired polycide gates and active semiconductor areas. TiSi2 may be formed through physical vapor deposition (PVD) or chemical vapor deposition (CVD). PVD entails sputtering titanium followed by a layer of silicon. The titanium and silicon are reacted to form TiSi2. Silicon from the underlying areas also reacts with the titanium to form TiSi2. CVD typically entails reacting titanium tetrachloride (TiCl4) and silane (SiH4) in the gas phase to form TiSi2. Silicon from the underlying areas is also consumed in the CVD reaction to form TiSi2.
While TiSi2 is a relatively low resistive conductor, the titanium is susceptible to oxidation during and after its formation. The resultant titanium dioxide (TiO2) increases the sheet resistance of the interconnect thereby increasing power dissipation and reducing the speed of the device. As used herein, sheet resistance is an electrical quantity measured on a thin layer and has the units of ohms/square. Further, a layer of TiO2 makes it difficult to form good electrical contacts on the TiSi2 interconnect and poses adhesion problems when subsequent layers are deposited on top of the interconnect line. Further, TiSi2 is susceptible to damage during subsequent contact formation as the typical contact etch also consumes TiSi2. Typically, the size of the interconnect must be increased in order to compensate for damage caused by the contact etch.
Accordingly, there is a need for a local interconnect having a lower resistance and one in which the effects of oxidation are reduced. Preferably, the local interconnect smaller in width and thickness. There is also a need for a method of forming such a local interconnect. Preferably, such a method would be inexpensive, easy to implement and would not entail excess processing steps.
The present invention meets these needs by providing a local interconnect, formed by a process in which a layer of metal silicide serves both as a hard mask and source of silicon for an underlying layer of metal. The metal silicide is patterned to form the boundaries of the local interconnect and then reacted with the underlying layer of metal. Silicon from the metal silicide combines with the underlying metal to form another metal silicide. An intermetallic compound comprised of metal from the underlying metal layer and metal from the-metal silicide is also formed. Unreacted metal from the underlying metal layer is removed to form the local interconnect. The metal silicide also serves as a contact etch stop during subsequent contact formation thereby allowing for a smaller local interconnect.
According to a first aspect of the present invention, a process of forming a local interconnect comprises providing at least one semiconductor layer. A layer of metal is formed over the at least one semiconductor layer. A contact etch stop is formed over the layer of metal. The layer of metal is reacted with the contact etch stop and then the unreacted metal is removed from the layer of metal to form the local interconnect. The contact etch stop may comprise a metal silicide. The process may further comprise the step of patterning the contact etch stop to form the boundaries of the local interconnect. The step of patterning the contact etch stop to form the boundaries of the local interconnect may be performed prior to the step of reacting the layer of metal with the contact etch stop.
According to another aspect of the present invention, a process of forming a local interconnect comprises providing at least one semiconductor layer. A layer of metal is formed over the at least one semiconductor layer. A layer of metal silicide is formed over the layer of metal. The layer of metal silicide is reacted with the layer of metal, and then unreacted metal remaining from the layer of metal is removed to form the local interconnect. The layer of metal may comprise a refractory metal selected from the group consisting of chromium, cobalt, molybdenum, nickel, niobium, palladium, platinum, tantalum, titanium, tungsten, and vanadium. Preferably, the refractory metal comprises titanium. The layer of metal may have a thickness in the range of about 200 Angstroms to about 600 Angstroms, and preferably, approximately 300 Angstroms. The layer of metal silicide may comprise tungsten silicide. The layer of metal silicide may have a thickness in the range of about 500 Angstroms to about 1200 Angstroms, and preferably, in the range of about 600 Angstroms to about 700 Angstroms. The step of reacting the layer of metal silicide with the layer of metal may comprise annealing the layer of metal silicide and the layer of metal at a temperature ranging from about 600xc2x0 C. to about 700xc2x0 C.
According to yet another aspect of the present invention, a process of forming a local interconnect comprises providing at least one semiconductor layer. A layer of metal is formed over the at least one semiconductor layer by chemical vapor deposition (CVD). A layer of metal silicide is formed over the layer of metal by CVD. The layer of metal silicide is then patterned. The metal silicide is reacted with the layer of metal and then unreacted metal remaining from the layer of metal is removed to form the local interconnect. The step of forming a layer of metal over the at least one semiconductor layer by CVD and the step of forming a layer of metal silicide over the layer of metal by CVD are preferably carried out in the same vacuum environment.
According to a further aspect of the present invention, a process of forming a local interconnect comprises providing at least one semiconductor layer. A layer of metal is formed over the at least one semiconductor layer. A layer of first metal silicide is formed over the layer of metal. The layer of first metal silicide and the layer of metal are annealed to form a composite structure. Remaining metal from the layer of metal is removed to form the local interconnect. The composite structure may comprise the first metal silicide, a second metal silicide and an intermetallic compound comprising metal from the layer of metal and metal from the first metal silicide. The layer of metal may comprise titanium and the first metal silicide may comprise tungsten silicide, such that the composite structure comprises tungsten silicide, titanium silicide, and titanium tungsten intermetallic compound. The process may further comprise the step of patterning the layer of first metal silicide to form a boundary of the local interconnect. The step of patterning the layer of first metal silicide to form a boundary of the local interconnect is preferably performed prior to the step of annealing the layer of first metal silicide and the layer of metal to form a composite structure.
According to a still further aspect of the present invention, a process of forming a local interconnect comprises providing at least one semiconductor layer. A layer of refractory metal is formed over the at least one semiconductor layer. A layer of first metal silicide is formed over the layer of refractory metal. The layer of first metal silicide is patterned to define a boundary of the local interconnect. The patterned first metal silicide and the layer of refractory metal are annealed to form a composite structure. Refractory metal remaining from the layer of refractory metal is removed to form the local interconnect. The step of patterning the layer of first metal silicide to define a boundary of the local interconnect may comprise the step of selectively etching the layer of first metal silicide. The step of selectively etching the layer of first metal silicide may comprise the step of dry etching the layer of first metal silicide. The step of annealing the patterned first metal silicide and the layer of refractory metal to form a composite structure is preferably carried out in an atmosphere of reactive nitrogen such that at least refractory metal remaining from the layer of refractory metal is nitrified.
According to another aspect of the present invention, a process of forming a local interconnect comprises providing at least one semiconductor layer. A layer of titanium having a thickness ranging from about 200 Angstroms to about 600 Angstroms is formed over the at least one semiconductor layer. A mask layer of tungsten silicide having a thickness ranging from about 500 Angstroms to about 1200 Angstroms is formed over the layer of titanium. The mask layer is selectively etched to define a boundary of the local interconnect. The mask layer and the layer of titanium are annealed in an atmosphere of reactive nitrogen thereby forming a composite structure of titanium silicide, tungsten silicide and a titanium tungsten intermetallic compound where the mask layer contacts the layer of titanium. The layer of titanium not covered by the mask layer is nitrified to form a layer of titanium nitride. The layer of titanium nitride and underlying titanium is then removed to form the local interconnect.
According to yet another aspect of the present invention, a process of forming a semiconductor device comprises providing a substrate assembly having at least one semiconductor layer. Source and drain regions of a field effect transistor are formed in the at least one semiconductor layer. A gate oxide is formed over the at least one semiconductor layer. A gate contact is formed over the gate oxide. A layer of refractory metal is formed over the at least one semiconductor layer. A layer of first metal silicide is formed over the layer of metal. The layer of first metal silicide is patterned to define a boundary of a local interconnect. The layer of refractory metal and the layer of first metal silicide are annealed to form a composite structure. Remaining refractory metal from the layer of refractory metal is removed to form the local interconnect. The local interconnect connects at least one of the source, drain, and gate to another active area within the substrate assembly.
According to a further aspect of the present invention, a process of forming a memory array having a plurality of memory cells arranged in rows and columns with each of the plurality of memory cells comprising at least one field effect transistor comprises providing at least one semiconductor layer. Sources, drains and gates for each of the field effect transistors are formed over the at least one semiconductor layer. A layer of refractory metal is formed over the at least one semiconductor layer. A layer of first metal silicide if formed over the layer of refractory metal. The layer of first metal silicide is patterned to define a boundary of at least one local interconnect. The layer of refractory metal and the layer of first metal silicide are annealed to form a composite structure. Remaining metal from the layer of refractory metal is removed to form the at least one local interconnect. The at least one local interconnect connects at least one of the source, drain and gate of one of the field effect transistors with another active area of the memory array.
According to a yet still further aspect of the present invention, a process of fabricating a wafer comprises providing a wafer having a substrate assembly. The substrate assembly has at least one semiconductor layer. A repeating series of sources, drains and gates for at least one field effect transistor on each of a plurality of individual die on the wafer are formed over the at least one semiconductor layer. A layer of refractory metal is formed over the at least one semiconductor layer. A layer of first metal silicide is formed over the layer of refractory metal. The layer of first metal silicide is patterned to define a boundary of at least one local interconnect in each of the individual die. The layer of refractory metal and the layer of first metal silicide are annealed to form a composite structure and refractory metal remaining from the layer of refractory metal is removed to form the at least one local interconnect in each of the individual die. The at least one local interconnect in each of the individual die connect at least one of the source, drain and gate of one of the field effect transistors with another active area in each of the individual die.
According to a further aspect of the present invention, a local interconnect comprises a composite structure. The composite structure comprises a first metal silicide, a second metal silicide and an intermetallic compound comprising metal from the first metal silicide and metal from the second metal silicide. The first metal silicide and the second metal silicide preferably each comprise at least one refractory metal. The at least one refractory metal for the first metal silicide and the second metal silicide are selected from the group consisting of chromium, cobalt, molybdenum, nickel, niobium, palladium, platinum, tantalum, titanium, tungsten, and vanadium. Preferably, the first metal silicide comprises titanium silicide and the second metal silicide comprises tungsten silicide.
According to a still further aspect of the present invention, a local interconnect for connecting a first active semiconductor region to a second active semiconductor region on a substrate assembly with the first and second active semiconductor regions being separated by an insulating region comprises a composite structure. The composite structure comprises a first refractory metal silicide, a second refractory metal silicide and an intermetallic compound comprising refractory metal from the first refractory metal silicide and refractory metal from the second refractory metal silicide. The refractory metal from the first refractory metal silicide is different from the refractory metal from the second refractor metal silicide. The composite structure preferably has a thickness in the range of about 700 Angstroms to about 1800 Angstroms.
According to another aspect of the present invention, a semiconductor device comprises a substrate assembly having at least one semiconductor layer. At least one field effect transistor is formed in the at least one semiconductor layer with the least one field effect transistor having a source, a drain and a gate. The semiconductor device further comprises a local interconnect for connecting at least one of the source, the drain and the gate to another active area within the substrate assembly. The local interconnect comprises a composite structure comprising a first refractory metal silicide, a second refractory metal silicide and an intermetallic compound comprising refractory metal from the first refractory metal silicide and refractory metal from the second refractory metal silicide.
According to a yet still further aspect of the present invention, a memory array comprises a plurality of memory cells arranged in rows and columns and formed on a substrate assembly having at least one semiconductor layer. Each of the plurality of memory cells comprises at least one field effect transistor and at least one local interconnect for connecting at least one of a source, a drain and a gate of the at least one field effect transistor in one of the plurality of memory cells to one of an active area within the one memory cell or to one of a source, a drain and a gate of the at least one field effect transistor in another one of the plurality of memory cells. The local interconnect comprises a composite structure comprising a first refractory metal silicide, a second refractory metal silicide and an intermetallic compound comprising refractory metal from the first refractory metal silicide and refractory metal from the second refractory metal silicide. The memory array may further comprise a plurality of local interconnects for connecting additional active areas within each of the plurality of memory cells. The memory array may also further comprise a plurality of local interconnects for connecting together active areas from different memory cells.
Accordingly, it is an object of the present invention to provide a low resistance local interconnect by a process in which a layer of metal silicide serves both as a mask and contact etch stop. Another aspect of the present invention is to provide a local interconnect which is smaller in width and thickness. Yet another object of the present invention is to provide a process of forming a local interconnect in which the negative effects of oxidation are reduced. It is a further object of the present invention to provide a process of forming a local interconnect which is inexpensive, easy to implement, and does not entail excess processing steps.
Other features and advantages of the invention will be apparent from the following description, the accompanying drawings and the appended claims.